📣 Paper 3 has been removed from NET from 2018 (Notification)- now paper 2 and 3 syllabus is included in paper 2. Practice both paper 2 and 3 from past papers.

NTA NET Electronic Science 2016 Past Paper Questions (Previous Year Papers) Part 1

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Q-1. In JFET the Trans conductance can be expressed as

1.

2.

3.

4.

Q-2. An electrodynamic generator is used to convert

1. Motion into voltage

2. Voltage into motion

3. Temperature into pressure

4. Pressure into temperature

Q-3. The effect of adding poles and zeros can be determined for determining phase and gain margin by

1. Magnitude Vs phase plot

2. Nyquist plot

3. Nicholas plot

4. Bode plot

Q-4. The small signal model of a tunnel diode in negative resistance region is

(1)

Negative Resistance

(2)

Negative Resistance

(3)

Negative Resistance

(4)

Negative Resistance

Q-5. The logic function implemented by the circuit below is

Logic Function Implemented by the Circuit

1. Y = P. Q

2. Y =

3.

4.

Q-6. For the following circuit, for making the output high (1) , the input combination must be

The Circuit Output and Input Combination

1. and

2. and

3. and

4. and

Q-7. Number of times the instruction sequence below will loop before coming out of loop is

MOV AL, 00H

A1: INC AL

JNZ A1

1.256

2.255

3.01

4.00

Q-8. The number of wait states required to interface 8279 to 8086 with 8 MHz clock are

1. One

2. Two

3. Three

4. None

Q-9. Which combination of the integer variables x, y and z makes the variable to get the value 4 in the following expression?

1.

2.

3.

4.